HaXing TriCks: UCET- IUB

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Tuesday, 23 February 2016

Engr. Yasir Shahzad

Opto-Electronics

Softwere for Opto labs
Labs Opto Electronics
Optical fiber communication by John M Senior 2nd Edition

FPGA Design

FPGA prototyping by Verilog Exampels

Wednesday, 7 October 2015

Matlab simulink files for Buck, Boost , Buck Boost and cook Converter By Engr Yasir Shahzad

Download Boost, Buck, Buck boost and cook converter best ever

click Here to download Boost converter

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Tuesday, 22 September 2015

The DSCH program is a logic editor and simulator. DSCH is used to validate the architecture of the logic circuit before the microelectronics design is started. DSCH provides a user-friendly environment for hierarchical logic design, and fast simulation with delay analysis, which allows the design and validation of complex logic structures.
DSCH also features the symbols, models and assembly support for 8051 and 16F84 controllers. Designers can create logic circuits for interfacing with these controllers and verify software programs using DSCH.

Check Picture Galley for DSCH

Highlights

			User-friendly environment for rapid design of logic circuits.
			Supports hierarchical logic design.
			Added a tool on fault analysis at the gate level of digital. Faults: Stuck-1, stuck-at-0. The technique allows injection of single stuck-at fault at the nodes of the circuit.
			Improved interface between DSCH and Winspice.
			Handles both conventional pattern-based logic simulation and intuitive on screen mouse-driven simulation.
			Built-in extractor which generates a SPICE netlist from the schematic diagram (Compatible with PSPICE^TM and WinSpice^TM).
			Generates a VERILOG description of the schematic for layout conversion.
			Immediate access to symbol properties (Delay, fanout).
			Model and assembly support for 8051 and PIC 16F84 microcontrollers.
			Sub-micron, deep-submicron, nanoscale technology support.
			Supported by huge symbol library